A central processing unit (CPU), also called a central processor or main processor, is the electronic circuitry within a computer that carries out the instructions of a computer program by performing the basic arithmetic, logic, controlling, and input/output (I/O) operations specified by the instructions. The computer industry has used the term "central processing unit" at least since the early 1960s.[1] Traditionally, the term "CPU" refers to a processor, more specifically to its processing unit and control unit (CU), distinguishing these core elements of a computer from external components such as main memory and I/O circuitry.[2]

The form, design, and implementation of CPUs have changed over the course of their history, but their fundamental operation remains almost unchanged. Principal components of a CPU include the arithmetic logic unit (ALU) that performs arithmetic and logic operations, processor registers t

Ein Grafikprozessor (englisch graphics processing unit, kurz GPU; dieses teilweise lehnübersetzt Grafikeinheit[1] und seltener auch Video-Einheit[1] oder englisch video processing unit sowie visual processing unit, kurz VPUgenannt[2]) ist ein auf die Berechnung von Grafiken spezialisierter und optimierter Prozessor für Computer, Spielkonsolen und Smartphones. Zusätzlich gibt er die berechneten Grafiken an ein oder mehrere Displays aus. Früher hatten Grafikkarten gar keine eigenen Rechenfähigkeiten und waren reine Ausgabekarten. Ab Mitte der 1990er Jahre wurden zuerst 2D-Fähigkeiten und später rudimentäre 3D-Fähigkeiten integriert, der Grafikprozessor war festverdrahtet oder seine Programmierbarkeit war beschränkt auf seine Firmware. Seit Mitte der 2000er Jahre kann der Hauptprozessor (englisch kurz CPU genannt) Programme auf die Grafikkarte oder auch in die Grafikeinheit laden, welche so in beschränktem Rahmen flexibel programmierbar ist.

Grafikprozessoren findet man auf dem Die von CPUs mit integrierter Grafikeinheit (manchmal APU genannt), auf der Hauptplatine (Onboard, als Integrierter Grafikprozessor) wie auch auf Erweiterungskarten (Steckkarte). Im letzteren Fall sind mehrere GPUs auf einer Grafikkarte, bzw. auch mehrere Grafikkarten pro PC möglich. Für Notebooks gibt es externe Erweiterungsboxen, in die eine Grafikkarte gesteckt werden kann; in Dockingstationen kann eine eigene Grafikeinheit verbaut sein. Fast alle heute produzierten Grafikprozessoren für Personal Computer stammen von AMD, Intel oder Nvidia. Die Integration auf Steckkarten liegt dagegen bis auf Sonder- und Referenzmodelle seit einiger Zeit bei anderen Herstellern.

Komponenten[Bearbeiten | Quelltext bearbeiten]

Ein Blockdiagramm des Radeon R300. Display interface (deu. Bildschirm-Schnittstelle) repräsentiert display controller + RAMDAC.

Display controller[Bearbeiten | Quelltext bearbeiten]

Zur Anbindung eines Bildschirms an einen Computer – etwa über MDA, CGA etc. – benötigt man einen sogenannten Bildschirm-Adapter (analog Netzwerk-Adapter). Der Chip auf der (z. B.) ISA-Karte ist ein vergleichsweise simpler Video Display Controller. Etwaige Berechnungen zur Bildsynthese erfolgen auf der CPU, der Display Controller verpackt diesen Datenstrom lediglich in ein entsprechendes Signal (CGA, EGA, …) für den Bildschirm. Die Karte enthält zusätzlich ein wenig Speicher, den sogenannten Bildschirmpuffer, engl. display buffer.

RAMDAC[Bearbeiten | Quelltext bearbeiten]

Der RAMDAC ist zuständig für die Umwandlung von digitalen Daten, welche im Videospeicher/Bildschirmpuffer vorliegen, in ein analoges Bildsignal.

Das englisch sogenannte Graphics and Compute Array (kurz GCA) oder auch die „3D-Engine“ (aus dem englischen 3D engine entlehnt) können auch für Grafik-Berechnungen ausgelegt sein. Das Array besteht zudem aus den sogenannten Shader-Prozessoren, beinhaltet aber auch den Geometry-Prozessor (siehe auch Geometry-Shader).

Video-Kompression/-Dekompression[Bearbeiten | Quelltext bearbeiten]

Zur Verringerung der Datenmenge eines Videos sind verschiedene Kompressions-Algorithmen entwickelt worden. Diese beschreiben umfangreiche Berechnungen, welche mit dem – bereits an sich umfangreichen – unkomprimierten Datenstrom durchgeführt werden müssen, um daraus den Komprimierten zu erhalten. Zum Abspielen eines komprimierten Videos, sind entsprechende Berechnungen auf den komprimierten Datenstrom durchzuführen.

Diese Berechnungen können ganz oder anteilig auf der Grafikkarte, dem Grafikprozessor oder auf einer anderen dafür entwickelten anwendungsspezifisch integrierten Schaltung durchgeführt werden.

Geschichte[Bearbeiten | Quelltext bearbeiten]

Vorläufer der Grafikprozessoren gab es seit etwa Anfang der 1980er Jahre. Damals dienten diese nur als Bindeglied zwischen der CPU und der Bildschirmausgabe und wurden daher Bildschirm-Adapter (analog Netzwerk-Adapter) Video Display Controller genannt. Weder hatten sie die Funktionalität, noch waren sie für eigenständige Berechnungen ausgelegt. Zunächst waren sie vor allem für eine selbständige Text- und Grafikausgabe zuständig und schonten damit den Systembus. Einige konnten später immerhin Spritesselbständig darstellen.

Das änderte sich Mitte der 1980er Jahre mit Rechnern wie dem Commodore Amiga oder dem Atari ST. Diese verfügten bereits über Blitting-Funktionen. Im x86-PC-Bereich kamen Grafikprozessoren mit solchen Zusatzfunktionen mit der zunehmenden Verbreitung grafischer Oberflächen auf, insbesondere dem Betriebssystem Microsoft Windows. Bausteine wie der ET-4000/W32 konnten einfache Befehle (z. B. „zeichne Viereck“) selbständig abarbeiten. Wegen des hauptsächlichen Einsatzes unter Windows wurden sie auch „Windows-Beschleuniger“ genannt.

Mitte der 1990er Jahre kamen die ersten 3D-Beschleuniger auf den Markt. Diese Grafikprozessoren waren in der Lage, einige Effekte und dreiecksbasierte Algorithmen (wie beispielsweise Z-Puffern, Texture Mapping) und Antialiasing auszuführen. Besonders dem Bereich Computerspiele verhalfen solche Steckkarten (wie die 3dfx Voodoo Graphics) zu einem Entwicklungsschub. Zur damaligen Zeit waren solche Anwendungen vorrangig durch den Prozessor begrenzt.

Die Bezeichnung GPU wurde erstmals von Nvidia intensiv genutzt, um die 1999 erschienene Nvidia-GeForce-256-Serie zu vermarkten. Diese Grafikkarte war (im Endkunden-Geschäft) als erste mit einer T&L-Einheit ausgestattet.

GPUs waren und sind wegen ihrer Spezialisierung auf Grafikberechnungen und Konzentration auf massiv parallelisierbare Aufgaben den CPUs in ihrer theoretischen Rechenleistung meist deutlich überlegen. Eine CPU ist für universelle Datenverarbeitung ausgelegt, die einzelnen CPU-Kerne sind zudem meist für schnelles Abarbeiten von sequentiellen Aufgaben optimiert. Die GPU zeichnet sich hingegen durch ein hohes Maß an Parallelisierung aus, da sich 3D-Berechnungen sehr gut parallelisieren lassen; dafür ist sie für 3D-Berechnungen spezialisiert, sie ist bei Berechnungen schnell, die diese Funktionalität verwenden. Es sind nach wie vor für bestimmte Aufgaben (z. B. für Texturfilterung) spezialisierte Einheiten („Fixed Function Units“) in der GPU enthalten. Ein aktuell übliches Anwendungsprogramm kann aufgrund der fehlenden Universalität i. A. nicht auf einer GPU ausgeführt werden. Ein Algorithmus, der sich auf die Fähigkeiten der GPU beschränkt, aber sehr seriell mit relativ wenig Datenparallelität arbeitet, kann die GPU nicht auslasten. Die relativ kleinen Caches in der GPU würden zu größeren Latenzen in der Programmausführung führen, die aufgrund mangelnder Parallelisierung des Programms nicht durch gleichzeitiges Abarbeiten vieler Aufgaben ausgeglichen werden könnten. Bei sequentiellen Aufgaben ist die CPU daher schneller.

Der Leistungsvorsprung gegenüber CPUs bei stark parallelisierbaren Aufgaben und die bereits vorhandenen SIMD-Eigenschaften machen aktuelle GPUs für wissenschaftliche, grafische und/oder datenintensive Anwendungen interessant. Diese Verwendung bezeichnet man als GPGPU. Die Einbeziehung der GPU hat z. B. im Volunteer-Computing-Projekt Folding@home zu einer enormen Steigerung der Rechenleistung geführt. Sie beschränkte sich zunächst auf die Chips des Herstellers ATI/AMD, im Jahr 2008 kam aber auch Nvidia-GPUs ab der GeForce-8-Serie hinzu. Für Grafikkarten von Nvidia existiert CUDA als API zur Nutzung der GPU für Berechnungen. Diese wird inzwischen auch genutzt, um in Spielen mittels PhysX Physikberechnungen durchzuführen. Inzwischen gibt es die offene Programmierplattform OpenCL, mit der Programme für CPU und GPU gleichermaßen entwickelt werden können. Zudem können heutige GPUs nicht nur mit einfacher Genauigkeit, sondern mit doppelter Genauigkeit rechnen.

Aufgaben[Bearbeiten | Quelltext bearbeiten]

Der Grafikprozessor übernimmt rechenintensive Aufgaben der 2D- und 3D-Computergrafik und entlastet dadurch den Hauptprozessor (CPU). Die Funktionen werden über Software-Bibliotheken wie DirectX oder OpenGL angesteuert. Die freigewordene Prozessorzeit kann somit für andere Aufgaben verwendet werden.

Eigenschaften[Bearbeiten | Quelltext bearbeiten]

Architekturen

hat supply operands to the ALU and store the results of ALU operations and a control unit that orchestrates the fetching (from memory) and execution of instructions by directing the coordinated operations of the ALU, registers and other components.

Most modern CPUs are microprocessors, meaning they are contained on a single integrated circuit (IC) chip. An IC that contains a CPU may also contain memory, peripheral interfaces, and other components of a computer; such integrated devices are variously called microcontrollers or systems on a chip (SoC). Some computers employ a multi-core processor, which is a single chip containing two or more CPUs called "cores"; in that context, one can speak of such single chips as "sockets".[3]

Array processors or vector processors have multiple processors that operate in parallel, with no unit considered central. There also exists the concept of virtual CPUs which are an abstraction of dynamical aggregated computational resources.[4]

 

 

EDVAC, one of the first stored-program computers

Early computers such as the ENIAC had to be physically rewired to perform different tasks, which caused these machines to be called "fixed-program computers".[5] Since the term "CPU" is generally defined as a device for software(computer program) execution, the earliest devices that could rightly be called CPUs came with the advent of the stored-program computer.

The idea of a stored-program computer had been already present in the design of J. Presper Eckert and John William Mauchly's ENIAC, but was initially omitted so that it could be finished sooner.[6] On June 30, 1945, before ENIAC was made, mathematician John von Neumann distributed the paper entitled First Draft of a Report on the EDVAC. It was the outline of a stored-program computer that would eventually be completed in August 1949.[7] EDVAC was designed to perform a certain number of instructions (or operations) of various types. Significantly, the programs written for EDVAC were to be stored in high-speed computer memory rather than specified by the physical wiring of the computer.[8] This overcame a severe limitation of ENIAC, which was the considerable time and effort required to reconfigure the computer to perform a new task.[9] With von Neumann's design, the program that EDVAC ran could be changed simply by changing the contents of the memory. EDVAC, however, was not the first stored-program computer; the Manchester Baby, a small-scale experimental stored-program computer, ran its first program on 21 June 1948[10] and the Manchester Mark 1 ran its first program during the night of 16–17 June 1949.[11]

Early CPUs were custom designs used as part of a larger and sometimes distinctive computer.[12] However, this method of designing custom CPUs for a particular application has largely given way to the development of multi-purpose processors produced in large quantities. This standardization began in the era of discrete transistor mainframes and minicomputers and has rapidly accelerated with the popularization of the integrated circuit (IC). The IC has allowed increasingly complex CPUs to be designed and manufactured to tolerances on the order of nanometers.[13] Both the miniaturization and standardization of CPUs have increased the presence of digital devices in modern life far beyond the limited application of dedicated computing machines. Modern microprocessors appear in electronic devices ranging from automobiles[14] to cellphones,[15] and sometimes even in toys.[16][17]

While von Neumann is most often credited with the design of the stored-program computer because of his design of EDVAC, and the design became known as the von Neumann architecture, others before him, such as Konrad Zuse, had suggested and implemented similar ideas.[18] The so-called Harvard architecture of the Harvard Mark I, which was completed before EDVAC,[19][20] also used a stored-program design using punched paper tape rather than electronic memory.[21] The key difference between the von Neumann and Harvard architectures is that the latter separates the storage and treatment of CPU instructions and data, while the former uses the same memory space for both.[22] Most modern CPUs are primarily von Neumann in design, but CPUs with the Harvard architecture are seen as well, especially in embedded applications; for instance, the Atmel AVR microcontrollers are Harvard architecture processors.[23]

Relays and vacuum tubes (thermionic tubes) were commonly used as switching elements;[24][25] a useful computer requires thousands or tens of thousands of switching devices. The overall speed of a system is dependent on the speed of the switches. Tube computers like EDVAC tended to average eight hours between failures, whereas relay computers like the (slower, but earlier) Harvard Mark I failed very rarely.[1] In the end, tube-based CPUs became dominant because the significant speed advantages afforded generally outweighed the reliability problems. Most of these early synchronous CPUs ran at low clock rates compared to modern microelectronic designs. Clock signal frequencies ranging from 100 kHz to 4 MHz were very common at this time, limited largely by the speed of the switching devices they were built with.[26]

Transistor CPUs[edit]

IBM PowerPC 604e processor

The design complexity of CPUs increased as various technologies facilitated building smaller and more reliable electronic devices. The first such improvement came with the advent of the transistor. Transistorized CPUs during the 1950s and 1960s no longer had to be built out of bulky, unreliable and fragile switching elements like vacuum tubes and relays.[27] With this improvement more complex and reliable CPUs were built onto one or several printed circuit boards containing discrete (individual) components.

In 1964, IBM introduced its IBM System/360 computer architecture that was used in a series of computers capable of running the same programs with different speed and performance.[28] This was significant at a time when most electronic computers were incompatible with one another, even those made by the same manufacturer. To facilitate this improvement, IBM used the concept of a microprogram (often called "microcode"), which still sees widespread usage in modern CPUs.[29] The System/360 architecture was so popular that it dominated the mainframe computer market for decades and left a legacy that is still continued by similar modern computers like the IBM zSeries.[30][31]In 1965, Digital Equipment Corporation (DEC) introduced another influential computer aimed at the scientific and research markets, the PDP-8.[32]

Fujitsu board with SPARC64 VIIIfx processors

Transistor-based computers had several distinct advantages over their predecessors. Aside from facilitating increased reliability and lower power consumption, transistors also allowed CPUs to operate at much higher speeds because of the short switching time of a transistor in comparison to a tube or relay.[33] The increased reliability and dramatically increased speed of the switching elements (which were almost exclusively transistors by this time), CPU clock rates in the tens of megahertz were easily obtained during this period.[34] Additionally while discrete transistor and IC CPUs were in heavy usage, new high-performance designs like SIMD (Single Instruction Multiple Data) vector processors began to appear.[35] These early experimental designs later gave rise to the era of specialized supercomputers like those made by Cray Inc and Fujitsu Ltd.[35]

Small-scale integration CPUs[edit]

CPU, core memor and extern bus interface of a DEC PDP-8/I, made of medium-scale integrated cuits

During this period, a method of manufacturing many interconnected transistors in a compact space was developed. The integrated circuit (IC) allowed a large number of transistors to be manufactured on a single semiconductor-based die, or "chip". At first, only very basic non-specialized digital circuits such as NOR gates were miniaturized into ICs.[36] CPUs based on these "building block" ICs are generally referred to as "small-scale integration" (SSI) devices. SSI ICs, such as the ones used in the Apollo Guidance Computer, usually contained up to a few dozen transistors. To build an entire CPU out of SSI ICs required thousands of individual chips, but still consumed much less space and power than earlier discrete transistor designs.[37]

IBM's System/370, follow-on to the System/360, used SSI ICs rather than Solid Logic Technology discrete-transistor modules.[38][39] DEC's PDP-8/I and KI10 PDP-10 also switched from the individual transistors used by the PDP-8 and PDP-10 to SSI ICs,[40] and their extremely popular PDP-11 line was originally built with SSI ICs but was eventually implemented with LSI components once these became practical.

Large-scale integration CPUs[edit]

Lee Boysel published influential articles, including a 1967 "manifesto", which described how to build the equivalent of a 32-bit mainframe computer from a relatively small number of large-scale integration circuits (LSI).[41][42] At the time, the only way to build LSI chips, which are chips with a hundred or more gates, was to build them using a MOS process (i.e., PMOS logic, NMOS logic, or CMOS logic). However, some companies continued to build processors out of bipolar chips because bipolar junction transistors were so much faster than MOS chips; for example, Datapoint built processors out of transistor–transistor logic (TTL) chips until the early 1980s.[42] At the time, MOS ICs were so slow that they were considered useful only in a few niche applications that required low power.[43][44]

As the microelectronic technology advanced, an increasing number of transistors were placed on ICs, decreasing the number of individual ICs needed for a complete CPU. MSI and LSI ICs increased transistor counts to hundreds, and then thousands. By 1968, the number of ICs required to build a complete CPU had been reduced to 24 ICs of eight different types, with each IC containing roughly 1000 MOSFETs.[45] In stark contrast with its SSI and MSI predecessors, the first LSI implementation of the PDP-11 contained a CPU composed of only four LSI integrated circuits.[46]

Microprocessors[edit]

Since the introduction of the first commercially available microprocessor, the Intel 4004 in 1970, and the first widely used microprocessor, the Intel 8080 in 1974, this class of CPUs has almost completely overtaken all other central processing unit implementation methods. Mainframe and minicomputer manufacturers of the time launched proprietary IC development programs to upgrade their older computer architectures, and eventually produced instruction set compatible microprocessors that were backward-compatible with their older hardware and software. Combined with the advent and eventual success of the ubiquitous personal computer, the term CPU is now applied almost exclusively[a] to microprocessors. Several CPUs (denoted cores) can be combined in a single processing chip.[47]

Previous generations of CPUs were implemented as discrete components and numerous small integrated circuits (ICs) on one or more circuit boards.[48] Microprocessors, on the other hand, are CPUs manufactured on a very small number of ICs; usually just one.[49] The overall smaller CPU size, as a result of being implemented on a single die, means faster switching time because of physical factors like decreased gate parasitic capacitance.[50][51] This has allowed synchronous microprocessors to have clock rates ranging from tens of megahertz to several gigahertz. Additionally, the ability to construct exceedingly small transistors on an IC has increased the complexity and number of transistors in a single CPU many fold. This widely observed trend is described by Moore's law, which had proven to be a fairly accurate predictor of the growth of CPU (and other IC) complexity until 2016.[52][53]

While the complexity, size, construction and general form of CPUs have changed enormously since 1950,[54] the basic design and function has not changed much at all. Almost all common CPUs today can be very accurately described as von Neumann stored-program machines.[55][b] As Moore's law no longer holds, concerns have arisen about the limits of integrated circuit transistor technology. Extreme miniaturization of electronic gates is causing the effects of phenomena like electromigration and subthreshold leakage to become much more significant.[57][58] These newer concerns are among the many factors causing researchers to investigate new methods of computing such as the quantum computer, as well as to expand the usage of parallelism and other methods that extend the usefulness of the classical von Neumann model.

Operation[edit]

The fundamental operation of most CPUs, regardless of the physical form they take, is to execute a sequence of stored instructions that is called a program. The instructions to be executed are kept in some kind of computer memory. Nearly all CPUs follow the fetch, decode and execute steps in their operation, which are collectively known as the instruction cycle.

After the execution of an instruction, the entire proces

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s repeats, with the next instruction cycle normally fetching the next-in-sequence instruction because of the incremented value in the program counter. If a jump instruction was executed, the program counter will be modified to contain the address of the instruction that was jumped to and program execution continues normally. In more complex CPUs, multiple instructions can be fetched, decoded and executed simultaneously. This section describes what is generally referred to as the "classic RISC pipeline", which is quite common among the simple CPUs used in many electronic devices (often called microcontroller). It largely ignores the important role of CPU cache, and therefore the access stage of the pipeline.

Some instructions manipulate the program counter rather than producing result data directly; such instructions are generally called "jumps" and facilitate program behavior like loops, conditional program execution (through the use of a conditional jump), and existence of functions.[c] In some processors, some other instructions change the state of bits in a "flags" register. These flags can be used to influence how a program behaves, since they often indicate the outcome of various operations. For example, in such processors a "compare" instruction evaluates two values and sets or clears bits in the flags register to indicate which one is greater or whether they are equal; one of these flags could then be used by a later jump instruction to determine program flow.

Fetch[edit]

The first step, fetch, involves retrieving an instruction (which is represented by a number or sequence of numbers) from program memory. The instruction's location (address) in program memory is determined by a program counter (PC), which stores a number that identifies the address of the next instruction to be fetched. After an instruction is fetched, the PC is incremented by the length of the instruction so that it will contain the address of the next instruction in the sequence.[d] Often, the instruction to be fetched must be retrieved from relatively slow memory, causing the CPU to stall while waiting for the instruction to be returned. This issue is largely addressed in modern processors by caches and pipeline architectures (see below).

Decode[edit]

The instruction that the CPU fetches from memory determines what the CPU will do. In the decode step, performed by the circuitry known as the instruction decoder, the instruction is converted into signals that control other parts of the CPU.

The way in which the instruction is interpreted is defined by the CPU's instruction set architecture (ISA).[e] Often, one group of bits (that is, a "field") within the instruction, called the opcode, indicates which operation is to be performed, while the remaining fields usually provide supplemental information required for the operation, such as the operands. Those operands may be specified as a constant value (called an immediate value), or as the location of a value that may be a processor register or a memory address, as determined by some addressing mode.

In some CPU designs the instruction decoder is implemented as a hardwired, unchangeable circuit. In others, a microprogram is used to translate instructions into sets of CPU configuration signals that are applied sequentially over multiple clock pulses. In some cases the memory that stores the microprogram is rewritable, making it possible to change the way in which the CPU decodes instructions.

Execute[edit]

After the fetch and decode steps, the execute step is performed. Depending on the CPU architecture, this may consist of a single action or a sequence of actions. During each action, various parts of the CPU are electrically connected so they can perform all or part of the desired operation and then the action is completed, typically in response to a clock pulse. Very often the results are written to an internal CPU register for quick access by subsequent instructions. In other cases results may be written to slower, but less expensive and higher capacity main memory.

For example, if an addition instruction is to be executed, the arithmetic logic unit (ALU) inputs are connected to a pair of operand sources (numbers to be summed), the ALU is configured to perform an addition operation so that the sum of its operand inputs will appear at its output, and the ALU output is connected to storage (e.g., a register or memory) that will receive the sum. When the clock pulse occurs, the sum will be transferred to storage and, if the resulting sum is too large (i.e., it is larger than the ALU's output word size), an arithmetic overflow flag will be set.